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Notes on silicon, arithmetic, and AI for chip design.

ASIC Brew coverMost read · Data formats · Jan 2025

The Road to MX: The Evolution of AI Data Formats

INT8, BFloat, FP8, MSFP, MX — if one factor drove the biggest AI efficiency gains of the past decade, it is the evolution of data formats.

 ASIC Brew coverDatapath · Feb 2025

Floating-Point Adders and Subtractors

“A bunch of tensors getting multiplied and added” — this is what 70% of AI workloads boil down to. Adders consume 4 to 30 times less energy than multipliers. A walk through what actually happens under the hood when hardware adds two floating-point numbers.

 ASIC Brew coverMemory · Dec 2024

SRAM Alone: The Bandwidth King That Falls Short on Capacity for LLMs

On-chip SRAM excels at bandwidth, but relying on it alone is inefficient for LLMs: LLaMA-3-70B needs 140 GB of weights plus several GB of KV cache. The memory footprint math, unpacked.